Various configurations of switched capacitor power conversion circuits provide voltage conversion (i.e., step up, step down, or bidirectional) between a high side voltage and a low side voltage through controlled transfers of charge between capacitors in the circuit. A Dickson charge pump is an example of such a conversion circuit. Control of the charge transfer between the capacitors generally makes use of circuit elements that act as “switches,” for example, diodes or FET transistors.
Some configurations of switch elements and capacitors limit the typical maximum voltage across the switch elements in normal operation. Such limited voltages permit use of switch elements that do not necessarily have to accommodate the full high side voltage or the difference between the high side and the low side voltages, thereby permitting use “low voltage” elements. For example, in a conventional Dickson charge pump performing a conversion between 20 volts and 5 volts in 4 stages, switch elements typically experience a maximum of 10 volts in operation and therefore require a rating (e.g., breakdown voltage rating) of 10 volts.
Charge pumps step up or step down an input voltage by storing a fraction of the input voltage across each capacitor. As the magnitude of the voltage conversion increases, the number of capacitors required increases. Switches on both terminals of each capacitor are necessary to perform the charge transfer, as well as configure the charge pump to provide a desired voltage conversion ratio.
FIGS. 1A-1B show two charge pumps. The first in FIG. 1A is a 1:3 step-down configuration and the second in FIG. 1B is a 3:1 step-up configuration. The voltage labels on each node have two values, one for each stage of operation: voltage value during stage 1/voltage value during stage 2. Each switch needs to be turned on and off in a non-overlapping manner during stage 1 or stage 2. For either the step-up or step-down, the node labeled VX is the lowest charge pump voltage level: VX is typically the output of a step-down, and conversely the input of a step-up. VX also sets the unit voltage drop across each switch when the switch is off: the switches at the bottom of the capacitors each see a maximum voltage drop of VX, while the switches at the top of each capacitor see a maximum voltage drop of 2VX. This means that the transistors selected as switches at the top of the capacitors require a drain-to-source breakdown voltage (BVDSS) above 2VX to avoid damage. In general, the higher the BVDSS of a MOS transistor, the larger the transistor area and capacitances for a given on-resistance which increases die cost and switching power loss. Therefore, it is desirable to use a transistor whose BVDSS is close to the maximum voltage drop the transistor needs to support.
FIG. 2 shows an interleaved version of the step-down charge pump in FIG. 1A where the switches at the top of each capacitor now see a maximum voltage drop of only VX. It should be noted that the FIG. 2 interleaved topology may reduce the maximum voltage drop seen across each switch, as simply cascoding each of the top switches (or using two series-connected transistors per top switch), although other approaches may also achieves this purpose. For most CMOS processes, the efficiency and die area gains from using the same low BVDSS transistors are still advantageous enough to justify the higher transistor count and complexity. The complexity arises from having to control and operate these low-voltage transistors at various common-mode voltage multiples of VX. Referring to FIG. 2 as an example, the switch that connects the top-most capacitor to VIN at 6V can be a 3.3V transistor since the transistor sees 2V differentially across its drain-to-source terminals when not conducting, despite the absolute voltage levels at the transistor drain and source terminals (4V or 6V depending on the stage of operation; 4V being the common-mode voltage level for this switch) exceeding 3.3V. This is because BVDSS is a differential voltage constraint across the transistor drain-to-source terminal, rather than an absolute constraint at each of the transistor terminals. Although the drain and source terminals each have an absolute breakdown voltage to the silicon substrate, these absolute breakdown voltages are typically much higher than BVDSS and therefore allow the transistor to be operated at a common-mode voltage level above BVDSS.
In addition to BVDSS, another differential voltage constraint for a MOS transistor is the maximum gate-to-source voltage (VGSmax) which is determined by the gate-oxide breakdown voltage. Modern CMOS processes with small geometries and low-voltage transistors require thinner gate oxides to maintain performance, which results in lower VGSmax ratings as well. This further complicates the design of a high voltage conversion ratio charge pump using low-voltage transistor switches, since care must be taken to avoid exceeding both gate-to-source and drain-to-source voltage constraints during switch operation.
Commonly available low-voltage transistor flavors such as the 1.8V, 3.3V and occasionally 5V transistors, usually specify a VGSmax rating equal to the maximum operating drain-to-source voltage rating, VDSmax, where VDSmax<BVDSS. For applications where the minimum VX voltage in the operating range is sufficiently above the transistor threshold voltage, it becomes practical and convenient to use the same VX voltage level for the transistor gate drivers, instead of generating separate internal supply rails for this purpose. This is due to the fact that a VX-level voltage is already generated and supported between each non-switching node (e.g. VIN, VX, 4V node between the capacitors in FIG. 2) in the interleaved charge pump, inherent to the charge pump operation itself. Therefore, the gate driver for each transistor can be level shifted to the common-mode voltage level of that transistor, use the same low-voltage transistors, and drive the transistor gate-to-source voltage between 0V and VX, as shown in FIG. 3. The nth section of an interleaved charge pump showing a pair of switches at the top of a capacitor, where n is an integer. An equivalent transistor-level representation is shown on the right with the gate drivers used to turn the transistors on and off. The transistors and the gate driver circuitry see a maximum of a VX voltage across them. The high-side switch shown is a PMOS transistor, but can also be an NMOS if its gate driver was bootstrapped between the capacitor node shown and an adjacent capacitor node that switches between Vn+1 and Vn+2 
Charge-pumps step-down or step up an input voltage by storing a portion or multiples of the input voltage across capacitors. As the magnitude of the transformation increases, the number of capacitors used increases. Each capacitor helps create a unique intermediate voltage during part of the operating cycle. The switches used to re-arrange the capacitors into different configurations need to be powered by some energy source.
In FIGS. 4A-B, a series-parallel and a Dickson charge pump in a 1:5 (step-down) configuration (or 5:1—step-up—if the power flow is reversed) are shown. The voltage labels on each node have two values: the first is the voltage value during stage 1 of operation; the second is the voltage value during stage 2 of operation.
In a Dickson charge-pump, each stage sees only a small fraction of the total voltage at the high voltage side of the charge-pump. This allows for using lower voltage rated devices and improves efficiency. However, if the high-voltage side should suddenly step up rapidly, it is possible for the low-voltage switches to experience temporary over-voltage stress that can result in damage.
In general, it is important to protect the switch elements from being exposed to voltages in excess of their breakdown voltages to prevent damage to the conversion circuit or faulty operation of the circuit.